Field-by-field correction, sometimes referred to herein as correction per exposure (CPE) methodology, was introduced in high volume manufacturing (HVM) production as an additional, complimentary, control loop to compensate for the systematic overlay wafer process signature from a process tool, such as a lithographic stepper or scanner. Run-to-run control loops using linear terms or high order control correctables are currently unable to provide the field-level resolution required to correct for process signatures. Accordingly, CPE control paths have been used to improve the overlay performance and has become well accepted in 2× nm HVM process nodes. Due to the need for a full wafer field sample plan, however, CPE correctables are typically not determined on a lot-by-lot basis. Instead, field-by-field control loops are maintained separate from the wafer-level resolution run-to-run control loops and are updated much less frequently (e.g. once every week or two), depending in part upon on wafer process stability.
In addition to the run-to-run and field-by-field control loops, a scanner baseline control loop is often recommended by process tool vendors to correct mechanical and optical drifts of the process tool. The baseline control loop periodically measures calibration wafers, such as non-product preventative maintenance (PM) wafers, to trace and correct the machine drift and to take care of fleet matching. Many of the process tools currently used in semiconductor fabrication rely on these three control paths: run-to-run, field-by-field, and scanner baseline. Accordingly, advance process control (APC) for process tools tends to be complex and costly. Moreover, as mentioned above, the current systems only allow for infrequent CPE updates, which are relatively time consuming in comparison to the standard APC run-to-run updates.